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SELSE-11 Program

SELSE-11 

 

The SELSE Program Committee is proud to announce our keynote speakers for SELSE-11!

Keynotes:

Keynote I: Application oriented fault tolerance system for Tianhe-2
Prof. Yutong Lu (NUDT)

Keynote II: RAS implications of a connected world Slides
Dr. Robert C. Aitken (ARM)

Keynote III: Energy-Efficient Resilience: Challenges and Pitfalls Slides
Dr. Pradip Bose (IBM)

SELSE is an informal workshop. To encourage widespread participation, authors are given the option (but are not required) to make their presentations available on this web site. We thank all of the authors for their participation.

 

Day 1 - March 31st, 2015 - Austin, TX 

08:00 - 08:45 Breakfast and Registration


08:45 - 09:00 Welcome Remarks: SELSE General and Program Chairs


09:00 - 10:00 Session I: Keynote Speech (Chair: Sudhanva Gurumurthi (AMD/U Virginia))

Application oriented fault tolerance system for Tianhe-2

Prof. Yutong Lu (NUDT)

 

10:00 - 10:30 Coffee Break


10:30 - 11:45 Session II: Soft Errors (Chair: Daniel Lowell (AMD))

Susceptibility of Planar and 3D Tri-Gate Technologies to Muon-induced Single Event Upsets, Slides

Norbert Seifert (Intel), Shah Jahinuzzaman (Intel), Jyothi Velamala (Intel) and Nikunj Patel (Intel)


Experimental Results of SEU-Tolerant Flip-flops in a 28nm Process with HI and Laser, Slides

H.-B. Wang (U Saskatchewan), E. Teng, Y. Ren (U Saskatchewan), L. Chen (U Saskatchewan), K. Lilja (Robust Chip), M. Bounasser (Robust Chip), N. Mahatme (Freescale), S.-J. Wen (Cisco), R. Wong (Cisco), R.Fung (Cisco), S. Baeg (Hanyang U), and B. Bhuva (Vanderbilt U)


Host-Compiled Reliability Modeling for Fast Estimation of Architectural Vulnerabilities, 

Zhuoran Zhao (U Texas at Austin), Dongwook Lee (U Texas at Austin), Andreas Gerstlauer (U Texas at Austin) and Lizy John (U Texas at Austin)

 

11:45 - 13:00 Lunch


13:00 - 14:15 Session III: Panel Discussion (Chair: Alan Wood (Oracle))

Topic: Tackling Reliability in Accelerator-Based Systems

Panelists:

Cameron McNairy (Intel)

Steve Keckler (NVIDIA) Slides

Michael Schulte (AMD)

Mike Flynn (Maxeler) Slides

Austin Lesea (Xilinx) Slides


14:15 - 15:45 Session IV: Poster Session (Chair: William Robinson (Vanderbilt U)) and Coffee Break 

Analysis of Soft Error Rates by Supply Voltage in 65-nm SOTB and 28-nm UTBB Structures by a PHITS-TCAD Simulation System,

Kuiyuan Zhang (Kyoto Institute of Technology), Shohei Kanda (Kyoto Institute of Technology), Junki Yamaguchi (Kyoto Institute of Technology), Jun Furuta (Kyoto Institute of Technology) and Kazutoshi Kobayashi (Kyoto Institute of Technology)

 
The Effects of EDA Placement Modification for Mitigating Radiation-Induced Multiple Transients,

Bradley Kiddie (Vanderbilt U) and William Robinson (Vanderbilt U)

 

Detecting Soft Errors in Stencil based Computations, Slides

Vishal Sharma (U Utah), Greg Bronevetsky (U Utah) and Ganesh Gopalakrishnan (Lawrence Livermore National Laboratory)

 

Empirical Studies of the Soft Error Susceptibility of Sorting Algorithms to Statistical Fault Injection,

Qiang Guan (Los Alamos National Laboratory), Nathan Debardeleben (Los Alamos National Laboratory), Sean Blanchard (Los Alamos National Laboratory) and Song Fu (U North Texas)

 
Big versus Little: Who will trip?, Slides

Reena Panda (U Texas at Austin), Christopher Erb (U Texas at Austin) and Lizy Kurian John (U Texas at Austin)

 

Challenges in Assessing Single Event Upset Impact on Processor Systems,

Wojciech Koszek (Xilinx), Austin Lesea (Xilinx), Glenn Steiner (Xilinx), Dagan White (Xilinx) and Pierre Maillard (Xilinx)

 

Examining the Impact of ACE interference on Multi-Bit AVF Estimates, Slides

Fritz Gerald Previlon (Northeastern U), Mark Wilkening (Northeastern U), Vilas Sridharan (AMD), Sudhanva Gurumurthi (AMD) and David Kaeli (Northeastern U)

 

15:45 - 17:00 Session V: Protection Techniques (Chair: Laura Monroe (LANL))

Software-based Dynamic Reliability Management for GPU Applications, Slides

Si Li (Georgia Institute of Technology), Vilas Sridharan (AMD), Sudhanva Gurumurthi (AMD) and Sudhakar Yalamanchili (Georgia Institute of Technology)

 

FAME: Flexible Real-Time Aware Error Correction by Combining Application Knowledge and Run-Time Information, Slides

Andreas Heinig (TU Dortmund), Florian Schmoll (TU Dortmund), Björn Bönninghoff (TU Dortmund), Peter Marwedel (TU Dortmund) and Michael Engel (Leeds Beckett U)

 

Resilient Flip-Flop Design under Process and Runtime Variations,

Mohammad Saber Golanbari (Karlsruhe Institute of Technology), Saman Kiamehr (Karlsruhe Institute of Technology) and Mehdi B. Tahoori (Karlsruhe Institute of Technology)

 

17:00 - 18:00 Business Meeting - The Future of SELSE


18:30              Reception and Banquet


_


Day 2 - April 1st, 2015 - Austin, TX 

08:00 - 08:30 Breakfast

 

08:30 - 10:10 Session VI: Reliability Evaluation (Chair: John Daly (DoD))

MEMRES: A Fast Memory System Reliability Simulator, Slides

Shaodi Wang (UCLA), Henry Chaohong Hu (Samsung), Hongzhong Zheng (Samsung) and Puneet Gupta (UCLA)

 

A Layout-Aware Approach to Fault Injection for Improving Failure Mode Prediction,

Cyril Bottoni (ST Microelectronics), Benjamin Coeffic (ST Microelectronics), Jean Marc Daveau (ST Microelectronics), Gilles Gasiot (ST Microelectronics), Lirida Naviner (Telecom ParisTech) and Philippe Roche (ST Microelectronics)

 

SASSIFI: Evaluating Resilience of GPU Applications, Slides

Siva Kumar Sastry Hari (NVIDIA), Timothy Tsai (NVIDIA), Mark Stephenson (NVIDIA), Steve Keckler (NVIDIA) and Joel Emer (NVIDIA)

 

The Use of Benchmarks for High-Reliability Systems, Slides

Heather Quinn (LANL), Paolo Rech (UFRGS), Fernanda Lima Kastensmidt (UFRGS), William Robinson (Vardebilt U), Steve Guertin (JPL), Matteo Sonza Reorda (Politecnico di Torino), Michael Wirthlin (BYU), David Kaeli (Northeastern U), Miguel Aguirre (U Sevilla), Luis Entrena (U Carlos III de Madrid), Arno Bernard (Stellenbosch U), Luca Sterpone (Politecnico di Torino), Bradley Kiddie (Vanderbilt U) and Marco Desogus (Politecnico di Torino)

 

10:10 - 10:40 Coffee Break

 

10:40 - 11:40 Session VII: Keynote Speech (Chair: Sarah Michalak (LANL))

RAS implications of a connected world Slides

Dr. Robert C. Aitken (ARM)


11:40 - 12:30 Session VIII: Error Mitigation (Chair: Mattan Erez (UT Austin))

Comparing Hard and Soft Error Rate Models for Scaled SoCs,

Jerry Lee (Cisco), Amr Haggag (Freescale), Adrian Evans (iRoC) and Dan Alexandrescu (iRoC)

 

The Implications of Different DRAM Protection Techniques on Datacenter TCO, Slides

Panagiota Nikolaou (U Cyprus), Yiannakis Sazeides (U Cyprus), Marios Kleanthous (Mesoyios College) and Lorena Ndreu (U Cyprus)

 

12:30 - 13:45 Lunch


13:45 - 14:45 Session IX: Keynote Speech (Chair: Helia Naeimi (Intel))

Energy-Efficient Resilience: Challenges and Pitfalls Slides
Dr. Pradip Bose (IBM)

 

14:45 - 15:15 Coffee Break


15:15 - 16:30 Session X: Circuit Degradation (Chair: Siva Hari (NVIDIA))

MCPENS: Multiple-Critical-Path Embeddable NBTI Sensors for Dynamic Wearout Management, Slides

Xinfei Guo (U Virginia) and Mircea Stan (U Virginia)

 

Hardware Fault Compensation Using Supervised Learning,

Farah Taher (U Texas at Dallas) and Joseph Callenes-Sloan (U Texas at Dallas)

 

Sensitivity of SRAM Cell Most Probable SNM Failure Point to Time-Dependent Variability, Slides

Dimitrios Rodopoulos (NTUA), Yanos Sazeides (U Cyprus), Francky Catthoor (IMEC), Chrysostomos Nicopoulos (U Cyprus) and Dimitrios Soudris (NTUA)


16:30 Closing Remarks